Advanced Semiconductor Packaging Devices

Characterization of semiconductor packaging devices

Device performance and functionality are accelerating advanced packaging developments. However, as heterogeneous integration and sophisticated packaging push performance boundaries, the innovative architectures are posing new defect analysis and process characterization challenges. With increasing packaging density, shrinking interconnect dimensions, pitches, and novel materials, defectivity is on the rise. Packaging defects seriously affect the reliability and performance of the final product, potentially leading to failures in the field and massive loss of yield at the very end of the manufacturing line.

Semiconductor packaging device used for advanced packaging Advanced packaging device with high bandwidth memory, TSVs, and microprocessor

West Coast Failure Analysis Seminar: Ask the Expert


Cross-section of micro bumps in semiconductor packaging

Applications for semiconductor packaging device analysis

Explore how our combination of electrical failure analysis and physical failure analysis workflows address the metrology and defect analysis challenges with developing stacked chip-based semiconductor devices.

Advanced packaging device used as part of semiconductor packaging

Techniques for semiconductor packaging device analysis

Discover the innovative techniques employed by Thermo Scientific systems for characterizing advanced packaging devices.

 

 

For Research Use Only. Not for use in diagnostic procedures.